IBM has unveiled a new chip design which could allow 100 billion transistors on a silicon chip as small as a human fingernail.
IBM’s new chip technology is the equivalent of around 0.7 nanometres, which could make it the world’s first chip technology below one nanometre.
The company claims that, in tests, that its prototype performed 50% better than its own two nanometre chip and claims that the new development is 70% more energy efficient.
Chips that feature more transistors become more powerful, though it has grown increasingly more difficult to sustain the increasing amount of transistors on chips. Rather than stacking transistors onto the surface horizontally, IBM’s approach layers sheets of transistors on top of each other, changing the shape of the chip by making it taller.
The major obstacle facing 3D chip designers is heat, as transistors can get hot as they work when heat rises.
Described as resembling a ‘block of flats’, IBM’s NanoStack technology is hailed by the company’s director of research as a “landmark moment” for the future of chips. Professor Alan Woodward, computer scientist, Surrey University, described the design to the BBC: "IBM's NanoStack is like proposing a 100-storey skyscraper. I think it's fair to say IBM's proposals are the most ambitious.”
Jay Gambetta, director, IBM Research and IBM Fellow, commented: "With our new NanoStack architecture, we're not just making smaller transistors, we're reinventing how chips are built to deliver dramatically more power and energy efficiency”.